Wednesday, 11 May 2016

timing sequences


design of counters

synchronous



asynchronous

serial adder


shift registers


design with state equations


clocked sequential circuits (analysis & design )

state diagram


state reduction

assignment

flip flops


RS

D

JK

T

master slave

sequential logic circuits


parity generator design & examples


multiplexer & demultiplexer


decoder


magnitude comparator


code converter


desimal adder


binary parallel adder


design of combinational logic circuits

adder

subtractor

realization using logic gates


tabulation method


karnaugh map method


methods of minimization of logic functions


logic gates


logic functios


postulates of boolean algebra


representation of floating point numbers

precition
addition
subtraction
multiplication
division


addition & subtraction (octal,hexadecimal)


algorithems(binary,BCD)

ADDITION

SUBTRACTION

MULTIPLICATION

DIVISION

charecter representation & coding schemes

ASCII
BBCDIC

representation of BCD numbers


representation of negative numbers


conversions from systems to another

binary to decimal

binary:111011.101
decimal=(1*(2^5))+(1*(2^4))+(1*(2^3))+(0*(2^2))+(1*(2^1))+(1*(2^0)) (1*(2^-1))+(1*(2^-2))+(1*(2^-3)) = 32+16+8+0+2+1 . (.5+0+.125) = 59.625

number syatems

decimal


  • base 10




binary


  • base 2
octal


  • base 8


hexadecimal


  • base 16